Many switch-mode power supplies use older generation controller integrated circuits (ICs) because they are inexpensive. The output circuits of many of these controller ICs have limited power drive capabilities, and, therefore, do not efficiently drive modern power MOSFETs. Typically, the output circuits of these controller ICs are NPN transistors with open collector terminals. To drive a power MOSFET, the controller IC must generate a rail-to-rail output voltage waveform. This can be accomplished by connecting a resistor between the collector terminal of the NPN transistor and a suitable power supply, and by grounding the emitter terminal. However, the resulting NPN transistor with resistive pull-up suffers several drawbacks when used as a gate driver.
In particular, a MOSFET gate terminal exhibits a large non-linear input capacitance. A large total gate charge is required to slew the gate from one supply rail to the other. Large currents are required to transfer this amount of charge quickly enough to obtain the desired switching times for the MOSFET. The NPN transistor with resistive pull-up cannot generate the high currents required to achieve the desired switching times without the use of a prohibitively small pull-up resistor.
One solution connects an external gate driver circuit between the controller IC and the MOSFET to generate the high currents necessary to slew the large gate capacitance quickly. Generally, a gate driver circuit receives a low current signal to drive a highly capacitive load, such as a power MOSFET. The input signal controls the timing and duration of the high voltage/high current signal output to the load.
Internal and external capacitances and resistances, including those associated with the NPN transistor, cause the output voltage waveform generated by the NPN transistor with resistive pull-up to exhibit large rise and fall times. The resistive pull-up connected to the open-collector NPN transistor in older-generation controller ICs causes the output voltage waveform of the controller IC to rise very slowly. The output voltage waveform therefore exhibits an excessively long rise time. The output voltage waveform may also exhibit a long fall time due to other limitations of older-generation controller ICs.
A gate driver can reduce the rise and fall times of the voltage waveform supplied to the power MOSFET, but propagation delays associated with the rise and fall times of the output voltage waveform of the controller IC will still remain. These propagation delays are undesirable consequences of propagating through a node a digital control signal which exhibits large rise and fall times. Since large rise and fall times are associated with small slew rates, such nodes are said to be slew-rate limited.